[Solved] Command execution in Makefile

Linux Gurus,

I have a query regarding the execution of a complex command in the makefile of the current system.

I am currently using shell command in the makefile to execute the command. However my command fails as it is a combination of a many commands and execution collects a huge data... something like..

Makefile content

variable=$(shell ls -lart | grep name | cut -d/ -f2- )

However the make file execution fails with execvp failure..

Please suggest me any ways to overcome this issue. ... basically i would like to execute a complex command and assign that output to a makefile variable which i want to use in the program further...

I am novice to makefile programming... so pls forgive any mistages/ignorance....

Thanks Much !
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Well, one thing to remember is that makefile variables are recursive.

That is, when you set a variable to the output of a shell command, it doesn't necessarily run that immediately. It may decide to run that shell command every time, to get that output.

Making an include file for the makefile might be one way to do it. Creating a file that says 'var=value' in one step, then including it the next.

Thanks for the reply..

Could you please give me a example of "Making an include file for the makefile"...

# Makefile contents

all:target

includefile:
        ./script-that-makes-include-file > includefile

include includefile

target:includefile sourcefiles
        command to make target from source files

Oh..ok Thank You Corona688..