Problem With Makefile

I had created a Makefile for my project. my project file hierarchy is like this:

1. a source folder with main.c and Makefile in it
2. and a top level Makefile
   here is the Makefile in src folder

all: program

program: main.c
    gcc -o program main.c

clean:
    rm program

and here is top level Makefile:

all:
    cd src && $(MAKE) all

clean:
    cd src && $(MAKE) clean

program:
    cd src && $(MAKE) program

It is working fine but when i change top level Majefile to this:

all:
    cd src && $(MAKE) all

clean:
    cd src
    $(MAKE) clean

program:
    cd src && $(MAKE) program

and run for example make clean, the output is this:

cd src
make clean
make[1]: Entering directory `<Project Directory>'
cd src
make clean

it shows this in a loop and show lots of this without stopping.

are you absolutely certain that in the 2nd version the spaces before $(MAKE) are a tab character (they need to be, strange things will happen if it is spaces rather than a tab)

This is because the lines below a rule aren't all one big shell script. Each line is executed individually, and seperately: a cd one line above has no effect on the line below it. (And any line that errors out is where make stops.) Don't count on any changes except files carrying through from one statement to the next.

By the way: Try make -C src all instead of cd src && make all .

God bless you Corona688
I didn't consider this one:
Each line is executed individually, and seperately