makefile query

I need to create a makefile to compile a large program in Sun Workstation. Can you please let me know how to specify the path of a .c or .h if are located in a different path from the makefile?

I whould appriciate if you could post a section of this makefile

Thanx

I am not familier with Sun Worstation, i will tell u the situation in unix environment.

u will be having the one main .c Or .cpp file
just use the below command,

gcc -MM abc.cpp>anyname

the above option will re-direct all the dependence list including path into the anyname file.
abc.cpp is the main cpp file, in which so many files are included

Here is one sample makefile for your purpose

# Sample Makefile

SHELL=/bin/sh

.KEEP_STATE:

# Include .cpp in suffixes list
.SUFFIXES:$(.SUFFIXES) .cpp

# Rule for .cpp to .o
.cpp.o:
${COMPILE.cc} -o $@ $<

SOURCE_PATH=${HOME}/source

INCLUDE_PATH=-I.

OBJECTS = ${SOURCE_PATH}/a.o

TARGET=a.out

CPPFLAGS=${INCLUDE_PATH}-mt

all : ${TARGET}

${TARGET}: ${OBJECTS}
$(CCC) -o ${TARGET} ${OBJECTS}

clean:
$(RM) ${TARGET} ${OBJECTS}

In case the source files and Header files are present in other directories, then modify the paths pointed by variables INCLUDE_PATH and SOURCE_PATH respectively..

I hope I am clear with the description.

Note: Kindly see the bolded commands starting with spaces. These are not the spaces but Tab.