Makefile: Parent - Child Inheritance and export

Shell Programming and Scripting
1

Hi,

I have a number of Makefiles, including a couple of files that I include in Makefiles, a few scripts that are executed through Makefiles, and I have problems with environment variables that are not inherited to the scripts properly.

Simplified scenario:

rootdir/Makefile:

all:
     ${MAKE} -C mk alla

rootdir/mk/Makefile:

export TARGET:= x86

include rootdir/mk/common.mk

alla:
       @echo I am in mk/Makefile

rootdir/mk/common.mk

$(shell ./print_target.sh)

rootdir/mk/print_target.sh

#/bin/bash

echo Target is: $TARGET  1>&2

And when I run rootdir/Makefile

I get

Target is:
I am in mk/Makefile

that is, the shell script did not inherit the TARGET environment variable.
However, if I put the export TARGET:= x86 in the root/Makefile instead, then the shell script does inherit the TARGET environment variable, i.e.

Target is: x86
I am in mk/Makefile

Why is that? And what is the solution?

I think I do understand that export will spawn a new child process, thus the makefile where the export is in, can not see it, which is also true for the include as it expands the common.mk.. But I thought that when you run a script, it will also create a child process and it will inherit the export environment variable??

Thanks in advance!

2

If anyone is interested, it is apparently a bug in Makefile, and there is no complete solution. However, in my case, I could pass the environment variable to $(shell) and the script would then have access to it.

$(shell TARGET=$(TARGET) ./print_target.sh)