how to run a shell script through Makefile

I want to run a target defined in a shell script. The shell script name is 'ua.sc' and the target in it is 'N' i.e. (ua N) throught a makefile. How can i do it so that i can run it with a make target.

Like this?

$ cat Makefile
target: 
    ./doEcho.sh $@ other_arg
$ cat doEcho.sh
#!/bin/bash
echo My argument is: $1
$ make target
./doEcho.sh target other_arg
My argument is: target

---------- Post updated at 09:49 PM ---------- Previous update was at 09:38 PM ----------

Or like this:

$ cat Makefile
target2: test.c
    $(shell ./makeTarget.sh $<)
$ cat makeTarget.sh
#!/bin/bash
echo "gcc -o myBinary $1"
$ make target2
gcc -o myBinary test.c
test.c:1:20: error: iostream: No such file or directory

I have a makefile, and the csh script with name 'abc.sc'. In the csh script i have a target which i run as "abc.sc N". now i want to run it using a makefile like "make X" which should invoke "abc.sc N" through makefile.

That was the first solution in my previous post.

Makefile:

X:
     ./abc.sc N

Then invoking

 make X

should launch the script.

1 Like