Four-Level multi-paging on x86 system with 64 bit addressing

  1. The problem statement, all variables and given/known data:
    Hi all,
    I've got a huuuuuuge problem with understanding this new concept of multi-paging. I really tried to research but i could not find anything significant. I've been trying to understand this for 4 days and i cannot. The question is:
    "Have a look on the diagram with the page table layout for a Linux OS that is running on Intelx86 system with 64-bit addressing. Consider a process whose image, in virtual memory, occupies three 4KB page and one 2MB super page its static data. What is the minimum number of PGD, PUD, PMD and PTE entries which must be maintained by Linux for this process? What is maximum number?"

Link to diagram:

  1. Relevant commands, code, scripts, algorithms:

  2. The attempts at a solution (include all code and scripts):

Well as i couldn't find any information so thats the reason i'm asking here. For the PTE i think i would calculate:

2^64/2^12 = 2^52

Please i will be very appreciate for any hints.

  1. Complete Name of School (University), City (State), Country, Name of Professor, and Course Number (Link to Course):

University of Auckland
Auckland City
New Zealand
Clark Thomborson

---------- Post updated at 12:17 PM ---------- Previous update was at 05:41 AM ----------

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