SunOS 5.5.1 usage of Makefile command in make file

UNIX Solaris
1

I am new to Solaris and compilation using make files.
I have a code base which is organized into different folders. At the root folder is a master make file and in the sub directories, there are make files for that particular folder.

In the make files present in subdirectories, I am seeing that "Makefile" is being used as a command for generating .obj files. For e.g.

 abc.obj : abc.asm \
 ../kernal/xxx.def \
 ../kernal/yyy.def \
 ../kernal/zzz.def \
 ../kernal/queue.def \
 Makefile \
 aaa.def \
 bbb.asm \
 ccc.asm \
 ddd.mac

Some other line

 abc.obj : abc.asm Makefile $(BB_INCS) xxx.def

Below are my questions.

  1. Why is "Makefile" being used as a command? What does it signify? It is not defined anywhere in any other make file also.
  2. What is a .mac file in Solaris? what is it's purpose?
  3. What is the use of .def file in SOlaris? What is it's purpose?
2

You might be new, but SunOS 2.5.1 is more archaeology that CS nowadays.

There is no evidence in the posted material Makefile is used as a command. Nowhere is it executed. That would be quite surprising anyway.

No specific purpose, there are no .mac type with Solaris, the developers might have chosen that extension for macros or whatever.

Same as the above. The best guess would be some defines.

3

Hi,

Just out of curiosity, could this possibly be software from one of the older MC68000 systems and not a SPARC system.

What is the hardware, if it is SPARC - what is the compiler that you are running?

Regards

Gull04