Makefile -> pc precedence over c

Hi All,

I have created a common makefile that compiles both pc and c files.

i have created the dependency between the files as

.pc.o:
-----------
.c.o:
-----------

I will be deleting the .c files created from the .pc files, once the object file is created. ( better storage maintenance)

so when i have a rule like

foo: foo.o
-----

for building foo.o the precedence always goes for .c.o, i mean the make file checks for foo.c first and builds it.

What i want is to change the precedence to .pc, i.e

when i build foo, the precedence should first go to
.pc.o rule and then to .c.o.

how can i achieve that?

It means dependency that .c files are created from .pc files.

So it's bellow description you should write.

---------------
.pc.c:
---------------

Regards.

hey thank you.. but i dont what that as i wud be removing the generated c files for better space maintenance.

so that option wont suit me.. so is it possible to make the target condition

.o to check .pc first and then .c??

I think it's better that you write your task in Makefile.

RM=rm -f
PC2C_FILE=`find -name '*.pc' -exec echo {} \; | sed -e 's/.pc$$/.c/' `
.SUFFIXES:
.SUFFIXES: .c .o .obj .pc

all:    test.exe

test.exe:       test.o test2.o test3.o
        echo $^ > $@
.c.o:
        echo $^ > $@

.pc.c:
        echo $^ > $@

clean:
        $(RM) test.exe *.o
        make better_storage_maintenance

better_storage_maintenance:
        $(RM) $(PC2C_FILE)

ls result:

4 Makefile
0 test.pc
0 test2.c
0 test3.pc

case 1: Compile
$ make

echo test.pc > test.c
echo test.c > test.o
echo test2.c > test2.o
echo test3.pc > test3.c
echo test3.c > test3.o
echo test.o test2.o test3.o > test.exe
rm test3.c test.c

(red letter is automaticaly added. So do nothing.)

The version of make program I use:

GNU Make 3.80
Copyright (C) 2002  Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.

case 2: Better storage maintenance
$ make better_storage_maintenance

rm -f `find -name '*.pc' -exec echo {} \; | sed -e 's/.pc$/.c/' `

case 3: Cleaning
$ make clean

rm -f test.exe *.o
make better_storage_maintenance

case 4: look up .c file from .pc file
$ make test.c

echo test.pc > test.c

(You need to execute "make better_storage_maintenance" at later)

For GNU make you can also simply mark .c files as .PRECIOUS: so they won't be removed automatically.

I don't know details.

But, do .PRECIOUS option only keep .c file except for temp file ?

My result is it that I really execute it. (And I'm surprized!)

I am not sure that reason why it works.

I'm not sure I understand the question. .PRECIOUS marks a file as one which Make should not remove even if it was created as a temporary step and not as an end goal.

I think one reason.

If compiler failed on creating .o file from .c file, I must modifiy .pc file.
But I often have modified .c file at many times. And it works.

After a while. I create .c file from .pc file again.
But because my modified code is overrided, compiler notify me same Error again.

Therefore it's wrong that .c file exists at the time when Error raised.
So make may remove temporary file made automatically.

Hey, era . As you say, I write ".PRECIOUS: %.c" in Makefile.
And .c files don't be removed. It's interesting and fun! Thank you.

Regards.